Re: [hatari-devel] Blitter support for TT? |
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- To: hatari-devel@xxxxxxxxxxxxxxxxxxx
- Subject: Re: [hatari-devel] Blitter support for TT?
- From: Uwe Seimet <Uwe.Seimet@xxxxxxxxx>
- Date: Fri, 14 Feb 2020 09:14:54 +0100
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Hi Thomas,
Thank you, that's all I need.
Best regards
Uwe
> Am Thu, 13 Feb 2020 15:26:26 +0100
> schrieb Uwe Seimet <Uwe.Seimet@xxxxxxxxx>:
>
> > Hi,
> >
> > Is it possible to provide blitter support also for the TT? Of course,
> > this should not be the default configuration, but having this option
> > would be useful for certain testing scenarios.
>
> I think we should rather not add this, since this will cause only
> confusion in the future (we've had a couple of these
> does-the-TT-have-blitter-or-not discussions in the past already).
>
> But if you need it for a temporary test, it should be as easy as
> copying the blitter section from one of the other ioMemTab*.c files
> to ioMemTabTT.c like this:
>
> diff --git a/src/ioMemTabTT.c b/src/ioMemTabTT.c
> index 3be06266..7c56df4f 100644
> --- a/src/ioMemTabTT.c
> +++ b/src/ioMemTabTT.c
> @@ -35,6 +35,7 @@ const char IoMemTabTT_fileid[] = "Hatari ioMemTabTT.c : " __DATE__ " " __TIME__;
> #include "scc.h"
> #include "screen.h"
> #include "video.h"
> +#include "blitter.h"
> #include "stMemory.h"
>
>
> @@ -154,7 +155,38 @@ const INTERCEPT_ACCESS_FUNC IoMemTable_TT[] =
> { 0xff8961, SIZE_BYTE, NvRam_Select_ReadByte, NvRam_Select_WriteByte }, /* NVRAM/RTC chip */
> { 0xff8963, SIZE_BYTE, NvRam_Data_ReadByte, NvRam_Data_WriteByte }, /* NVRAM/RTC chip */
>
> - /* Note: The TT does not have a blitter (0xff8a00 - 0xff8a3e) */
> + { 0xff8a00, SIZE_WORD, Blitter_Halftone00_ReadWord, Blitter_Halftone00_WriteWord }, /* Blitter halftone RAM 0 */
> + { 0xff8a02, SIZE_WORD, Blitter_Halftone01_ReadWord, Blitter_Halftone01_WriteWord }, /* Blitter halftone RAM 1 */
> + { 0xff8a04, SIZE_WORD, Blitter_Halftone02_ReadWord, Blitter_Halftone02_WriteWord }, /* Blitter halftone RAM 2 */
> + { 0xff8a06, SIZE_WORD, Blitter_Halftone03_ReadWord, Blitter_Halftone03_WriteWord }, /* Blitter halftone RAM 3 */
> + { 0xff8a08, SIZE_WORD, Blitter_Halftone04_ReadWord, Blitter_Halftone04_WriteWord }, /* Blitter halftone RAM 4 */
> + { 0xff8a0a, SIZE_WORD, Blitter_Halftone05_ReadWord, Blitter_Halftone05_WriteWord }, /* Blitter halftone RAM 5 */
> + { 0xff8a0c, SIZE_WORD, Blitter_Halftone06_ReadWord, Blitter_Halftone06_WriteWord }, /* Blitter halftone RAM 6 */
> + { 0xff8a0e, SIZE_WORD, Blitter_Halftone07_ReadWord, Blitter_Halftone07_WriteWord }, /* Blitter halftone RAM 7 */
> + { 0xff8a10, SIZE_WORD, Blitter_Halftone08_ReadWord, Blitter_Halftone08_WriteWord }, /* Blitter halftone RAM 8 */
> + { 0xff8a12, SIZE_WORD, Blitter_Halftone09_ReadWord, Blitter_Halftone09_WriteWord }, /* Blitter halftone RAM 9 */
> + { 0xff8a14, SIZE_WORD, Blitter_Halftone10_ReadWord, Blitter_Halftone10_WriteWord }, /* Blitter halftone RAM 10 */
> + { 0xff8a16, SIZE_WORD, Blitter_Halftone11_ReadWord, Blitter_Halftone11_WriteWord }, /* Blitter halftone RAM 11 */
> + { 0xff8a18, SIZE_WORD, Blitter_Halftone12_ReadWord, Blitter_Halftone12_WriteWord }, /* Blitter halftone RAM 12 */
> + { 0xff8a1a, SIZE_WORD, Blitter_Halftone13_ReadWord, Blitter_Halftone13_WriteWord }, /* Blitter halftone RAM 13 */
> + { 0xff8a1c, SIZE_WORD, Blitter_Halftone14_ReadWord, Blitter_Halftone14_WriteWord }, /* Blitter halftone RAM 14 */
> + { 0xff8a1e, SIZE_WORD, Blitter_Halftone15_ReadWord, Blitter_Halftone15_WriteWord }, /* Blitter halftone RAM 15 */
> + { 0xff8a20, SIZE_WORD, Blitter_SourceXInc_ReadWord, Blitter_SourceXInc_WriteWord }, /* Blitter source x increment */
> + { 0xff8a22, SIZE_WORD, Blitter_SourceYInc_ReadWord, Blitter_SourceYInc_WriteWord }, /* Blitter source y increment */
> + { 0xff8a24, SIZE_LONG, Blitter_SourceAddr_ReadLong, Blitter_SourceAddr_WriteLong }, /* Blitter source address */
> + { 0xff8a28, SIZE_WORD, Blitter_Endmask1_ReadWord, Blitter_Endmask1_WriteWord },
> + { 0xff8a2a, SIZE_WORD, Blitter_Endmask2_ReadWord, Blitter_Endmask2_WriteWord },
> + { 0xff8a2c, SIZE_WORD, Blitter_Endmask3_ReadWord, Blitter_Endmask3_WriteWord },
> + { 0xff8a2e, SIZE_WORD, Blitter_DestXInc_ReadWord, Blitter_DestXInc_WriteWord }, /* Blitter dest. x increment */
> + { 0xff8a30, SIZE_WORD, Blitter_DestYInc_ReadWord, Blitter_DestYInc_WriteWord }, /* Blitter dest. y increment */
> + { 0xff8a32, SIZE_LONG, Blitter_DestAddr_ReadLong, Blitter_DestAddr_WriteLong },
> + { 0xff8a36, SIZE_WORD, Blitter_WordsPerLine_ReadWord, Blitter_WordsPerLine_WriteWord },
> + { 0xff8a38, SIZE_WORD, Blitter_LinesPerBitblock_ReadWord, Blitter_LinesPerBitblock_WriteWord },
> + { 0xff8a3a, SIZE_BYTE, Blitter_HalftoneOp_ReadByte, Blitter_HalftoneOp_WriteByte },
> + { 0xff8a3b, SIZE_BYTE, Blitter_LogOp_ReadByte, Blitter_LogOp_WriteByte },
> + { 0xff8a3c, SIZE_BYTE, Blitter_Control_ReadByte, Blitter_Control_WriteByte },
> + { 0xff8a3d, SIZE_BYTE, Blitter_Skew_ReadByte, Blitter_Skew_WriteByte },
> + { 0xff8a3e, SIZE_WORD, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
>
> { 0xff8c00, SIZE_BYTE, IoMem_VoidRead_00, IoMem_VoidWrite }, /* No bus error here */
> { 0xff8c01, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* SCC DMA Address Pointer (Highest byte) */
>
>
> HTH,
> Thomas
>
>