It has been more than 1 year now..
Here is an updated version of the FPU tester (diagnostic version). I'll
release an update to the original testing tool once this has settled.
Hi
I found some more undocumented FPU behaviors (already implemented by
Andreas in softfloat emulation) that are not found by FPU tester:
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68040 FCMP: returns also N-bit set if either parameter is NaN with sign
bit set. 6888x and 68060 never return N + NAN flags set simultaneously.
Currently FCMP test returns error if CPU is 68040 which is fine for me,
at least this confirms FCMP difference.
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Monadic instruction, infinity as input value with high mantissa bit set
and instruction also returning infinity (because input was infinity):
Valid infinity bit patterns are:
7FFF 00000000 00000000 or 7FFF 80000000 00000000 (+inf)
FFFF 00000000 00000000 or FFFF 80000000 00000000 (-inf)
6888x and 68040: returned infinity value is same as input value,
mantissa high bit is not cleared.
68060: returned infinity mantissa is always zero.
FPU internally generated infinity has always zero mantissa.
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6888x and 68040 dyadic instruction that returns infinity when either (or
both) input values are infinity:
Fxxx a, b: if a is infinity: returned infinity equals a (including
mantissa high bit). if only b is infinity: returned infinity mantissa
high bit is always cleared.
68040 only "inverted" special case: FADD a,b and FSUB a,b: if a is
infinity but b isn't: zero mantissa returned. if b is infinity: b is
returned as is (with possibility for mantissa high bit being set)
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Above infinity weird cases are not detected by tester. Not that no
program most likely cares but it would be interesting to know if these
are model specific differences or if it was changed in some later revision.