Re: [hatari-devel] Better cycle accurate mode for 68030 / Falcon

On 9 February 2017 at 03:29, Nicolas Pomarède <npomarede@xxxxxxxxxxxx> wrote:

Another point : Rodolphe did many measurement about the cycles used by the Videl : you can find this on his site :

http://rodolphe.czuba.free.fr/CT2/english/technic.htm

The general idea is that the Videl reads the st memory in longs burst mode,
This can take from 4 up to 32% of the band width of the bus.

Yes, I know this page, including the 2 scan of notes he took on paper :)

I guess you know this too, the french version is actually richer on information: http://rodolphe.czuba.free.fr/CT2/french/technic.htm

That gives some idea and it's better than nothing, but that's not precise enough. When does the burst start ? When DE signal is on or before ? Does it preload during border ? How long does the burst last ? And so on. We lack a description of the signals at the bus level to see how and when videl get access.

I wish somebody enthusiastic would take a logic analyser and finally did this. We know ST internals inside out, esp. the overscan research in the past years is most impressive and yet we can't have even basic understanding how Videl operates...

For now, I could "slow down" the CPU bus access by 20% in true color mode for example, this would give an overall correct average, but that's not the cleanest way.

This is exactly the idea I wanted to propose -- it's actually quite easy, you just have to watch out for the cache (i.e. not to slow down cached instructions/memory accesses). Videl is, quite surprisingly, quite stable and primitive from VBL point of view. So while you have the random stuff happening per line, per VBL it's more or less constant time.

MiKRO / Mystic Bytes
http://mikro.atari.org