Re: [hatari-devel] DSP performance

[Toni Wilen <twilen@xxxxxxxxxx>]

> > That probably explains extra 2 cycle time. (Assuming memory cycles are
> without wait-states = 2 cycles/access)
>
> That's the real point.
> On Atari, the memory access is 4 cycles, not 2 as given by the Motorola docs.
>
> So that's why all the cycles have to be reworked for Falcon emulation, that's what I did in the static table.

4 cycles because it has 16bit bus and does 2 16-bit fetches? (2x2) or 
does it really take 2x4 cycles to fetch 32-bit word?

Emulation does not hardcode memory cycle times, most of it is automatic, 
one constant needs changing in gencpu.