Re: [hatari-devel] DSP performance |
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- To: hatari-devel@xxxxxxxxxxxxxxxxxxx
- Subject: Re: [hatari-devel] DSP performance
- From: Douglas Little <doug694@xxxxxxxxxxxxxx>
- Date: Fri, 26 Jun 2015 15:01:34 +0100
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Actually this whole thing still bothers me at some level. I can't quite put
my finger on it, but something doesn't add up in my head :-)
If there is one big table that specifies cycle counts for CPU instructions
(which seems fair) and everything is relative to that as a master
reference then surely all other divergences would just cancel out? Except
for divergence vs wallclock time - but that's not an issue here.
i.e. if the DSP runs an op which it thinks takes 2 master cycles and the
CPU runs an op which it thinks takes 8 master cycles, then you can expect 4
DSP ops executed in that same time.
If something breaks the CPU op timing so it takes 16 cycles, the DSP just
gets to execute 8 ops instead. The CPU got virtually slower. The DSP did
not get faster.