Re: [hatari-devel] Issues with cache hits/misses?

[Douglas Little <doug694@xxxxxxxxxxxxxx>]

Hi,

 

looking at the code in newcpu.c / read_dcache030, my understanding is that when reading a long word, if the read is at a misaligned address, then each subsequent read of a long word will also be misaligned.

So, for a movem that would read 13 long words for example, you would get 13*2 hits (because each individual long is misaligned), not 13+1 hits (to read the misaligned word then to have subsequent aligned long words) (this is without burst mode)

Unfortunately, the MC68030 User Manual example is only about 1 misaligned long word read, not several.

Tony what do you think ?

Yes, you're right - in terms of hits it will be double. I was thinking/talking in terms of misses, which is the other way around :-) It shouldn't 'miss' on the same longword in succession due to misaligned access, since the first miss will serve as a hit for the second...

D