|Re: [hatari-devel] Bootup differences|
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On sunnuntai 16 kesäkuu 2013, Nicolas Pomarède wrote:
> Le 16/06/2013 22:03, Eero Tamminen a écrit :
> > I was assuming that host clock could through RTC affect when interrupts
> > start ticking, but disabling that didn't help.
> > Nicolas, what else could be causing differences between successive
> > TOS bootups?
> well, those differences are rather small in the end, and are certainly
> higher on a real STF where the boot state is not necessarily known,
> because some components like MFP or ACIA use their own clock, and this
> clock is not synchronised to the 68000's one.
> That's why when the CPU needs to "talk" to the ACIA for example, a use
> of the E clock is required to synchronise both sides. This E clock has a
> fixed frequency (1/10 th of the CPU freq), but its phase is not known at
> start, this means that the same instruction at the same time will
> sometimes wait for 0 cycle, 2 or 4, etc.
Ah, I didn't know that, thanks!
> So, you can consider that some components in a ST create some kind of
> "fussyness", even if there's no real randomness in it.
Ok, so the starting state can be slightly "random" (unknown), but
anything happening after that is deterministic.
What exactly Hatari does to emulate this "randomness"?
And is there any way to disable this randomness if one wants 100% same
execution for successive boots?