|Re: [eigen] Help on solving a race condition|
[ Thread Index |
| More lists.tuxfamily.org/eigen Archives
- To: eigen@xxxxxxxxxxxxxxxxxxx
- Subject: Re: [eigen] Help on solving a race condition
- From: Bastien ROUCARIES <roucaries.bastien@xxxxxxxxx>
- Date: Mon, 11 Jun 2012 23:02:59 +0200
- Dkim-signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :content-type; bh=6OGYvjOwhzgEL8FDyyLi4ly+WwKQfYIb7nj8bvOMyZc=; b=lx2eP/pGsCaV5DoP+vfdshwqrPyJbcpe4jVuON3PdUL5BiOBB/LZrZk0J7fffKnvUY kVi49m2FNmQZk3wOX8NXsF/P0r833BrWDzlOnlA2T4y68v93lSpyjiQA1e6yvWEsnshf f8SjitkljcLlUGDLnrotiLlQQOYyN609u/eOghvlS5Uq5pWFTS0F2vI/IS80DfYpgTED +vADBnTIFA2J8NY6+VmxSt3+1PkqLAOwJkoPyCiYc0vERHZuin7yqG20wtRmB4dB9yqV z0Dq+gsf/Jske/g9QDpfHiqtiBxveyp7kT1odA40huMrFDRcQxDoy2APHLwFhnSwX6m3 ujkw==
On Mon, Jun 11, 2012 at 10:00 PM, Gael Guennebaud
> Thanks a lot, that's the kind of explanations I expected.
> So I'm afraid the only truly portable and robust solution will be to
> add an initialize function.
No please do not do that. Thread and tls function are pretty portable
(see below) and moreover c++11 need it in order to implement some
And please prefer GNUC solution that use the tls register that is a
free to use if your binary use dso.
you could fallback to static constructor if you want but I believe in
pratice it will be not used (local thread is used by gnulib and well
tested on a variety of platform).
If you want to use volatile notice that written to a volatile int is
safe a least in C language (therefore extern C), because int read is
in pratice atomic and if not it will break a lot of code. Thus a
portable solution will be to compute your value in a tempory struct
and move this struct to the final destination using the int word.
Initialised will be either 0 or 1. And if one it will other member
will be correctly initialised, due to implicit write an int is locally
safe (even on brain dead alpha). The problem is that you could not
have more than 32 bits of data in 32 bits processor.
here l1cache size is (1 << power) << m_l1CacheSize
l2cahce is (1<<power) << m_l2CacheSize
but if you use only one bit for initialised you could have only use
one bit for initialised (1<<15 for l1cache and 1<<16 for l2cache)