| Re: [AD] Patch for performance issues in i386 blitters |
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> I'm actually surprised it assembled at all, as es is 16 bits.
For the 'movl' variant ? Yes, it's indeed a little surprising.
> I'd have called that a bug in the source.
Both forms are explicitly supported according to my docs:
MOV r/m16,segreg ; o16 8C /r [8086]
MOV r/m32,segreg ; o32 8C /r [386]
MOV segreg,r/m16 ; o16 8E /r [8086]
MOV segreg,r/m32 ; o32 8E /r [386]
"In all forms of the MOV instruction, the two operands are the same size,
except for moving between a segment register and an r/m32 operand. These
instructions are treated exactly like the corresponding 16-bit equivalent
(so that, for example, MOV DS,EAX functions identically to MOV DS,AX but
saves a prefix when in 32-bit mode), except that when a segment register is
moved into a 32-bit destination, the top two bytes of the result are
undefined."
> Provided it does what I think it does: mov es, word|dword ptr [edx]
Ah! Intel syntax... yes.
--
Eric Botcazou
ebotcazou@xxxxxxxxxx