[chrony-users] chrony (or I210) loses PHC refclock PPS signal?

[Fabian <fabian.schoergi@xxxxxxxxx>]

I have the following setup:

Intel I210 with SDP0 as PPS input from a Ublox M8Q-MAX device.
The Ublox device is set to 1 Hz with 50% pulse width.
chrony 4.2, Debian 11 with Kernel 5.15, i5-8500T

I have configured the refclock:

refclock PHC /dev/ptp0:extpps:nocrossts:pin=0 width 0.5 poll 0 precision 
1e-9 pps refid GPS prefer trust

I have attached the whole chrony config down below.

After some time (which seems to be random, 1 - 24 hours) the PHC no 
longer produces a PPS interrupt (my guess), leading chrony to no longer 
chosing the PHC refclock. LastRx goes up, no longer recovering.
The Ublox module still outputs a 1 Hz pulse as measured by a logic 
analyzer (also the LED still blinks).

So when this happens I execute "ifdown eth0 && ifup eth0" and restart 
chrony. The refclock is now working again, until the next failure. 
Nothing shows up in dmesg regarding this event.

What could be the issue here? I am not sure if this mailing list is the 
correct one, as this might also be a kernel issue, or hopefully not a 
hardware issue with the Intel NIC.
I have tried some things: different powersupply for the GPS device 
aswell as the PC. Different CPU settings (powersafe, performance). 
Different Kernels: 5.10, 5.16.

I disconnected the serial output from the GPS. Tried with only PPS and 
GND connected, as I thought maybe the serial port was somehow 
interfering. Disabled EEE, which probably had no effect anyway as the 
switch does not support EEE.

I also tried disconnecting PPS output and reconnecting it again to see 
if the pulse would be picked up again, it did.


I'll try to get a chrony debug log when this happens.

Not sure what else I can try. Any hints?

best regards
Fabian

Some additional info:

Time stamping parameters for eth0:
Capabilities:
        hardware-transmit
        software-transmit
        hardware-receive
        software-receive
        software-system-clock
        hardware-raw-clock
PTP Hardware Clock: 0
Hardware Transmit Timestamp Modes:
        off
        on
Hardware Receive Filter Modes:
        none
        all
		
01:00.0 Ethernet controller: Intel Corporation I210 Gigabit Network 
Connection (rev 03)

Settings for eth0:
        Supported ports: [ TP ]
        Supported link modes:   10baseT/Half 10baseT/Full
                                100baseT/Half 100baseT/Full
                                1000baseT/Full
        Supported pause frame use: Symmetric
        Supports auto-negotiation: Yes
        Supported FEC modes: Not reported
        Advertised link modes:  10baseT/Half 10baseT/Full
                                100baseT/Half 100baseT/Full
                                1000baseT/Full
        Advertised pause frame use: Symmetric
        Advertised auto-negotiation: Yes
        Advertised FEC modes: Not reported
        Speed: 1000Mb/s
        Duplex: Full
        Auto-negotiation: on
        Port: Twisted Pair
        PHYAD: 1
        Transceiver: internal
        MDI-X: off (auto)
        Supports Wake-on: pumbg
        Wake-on: g
        Current message level: 0x00000007 (7)
                               drv probe link
        Link detected: yes

phc_ctl[356709.285]:
capabilities:
  62499999 maximum frequency adjustment (ppb)
  0 programable alarms
  2 external time stamp channels
  2 programmable periodic signals
  4 configurable input/output pins
  has pulse per second support
  doesn't have cross timestamping support


chrony.conf:

confdir /etc/chrony/conf.d
sourcedir /etc/chrony/sources.d
keyfile /etc/chrony/chrony.keys
driftfile /var/lib/chrony/chrony.drift
ntsdumpdir /var/lib/chrony
logdir /var/log/chrony
maxupdateskew 100.0
rtcsync
makestep 1 3
leapsectz right/UTC
hwtimestamp eth0
allow 192.168/16
log refclocks
peer 192.168.0.5 minpoll 2 maxpoll 6 iburst xleave key 1 extfield F323
peer 192.168.0.84 minpoll 2 maxpoll 6 iburst xleave key 1 extfield F323
refclock PHC /dev/ptp0:extpps:nocrossts:pin=0 width 0.5 poll 0 precision 
1e-9 pps refid GPS prefer trust

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