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- To: chrony-users@xxxxxxxxxxxxxxxxxxxx
- Subject: Re: [chrony-users] PLL?
- From: Miroslav Lichvar <mlichvar@xxxxxxxxxx>
- Date: Fri, 27 Nov 2020 10:39:25 +0100
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On Thu, Nov 26, 2020 at 11:28:20AM +0100, Olaf M. Kolkman wrote:
>
> Hello Miroslav,
>
> I am a bit curious about the inner workings of Chrony - I know I could dive into the code but you can probably answer this in a heartbeat.
>
> Occasionally after a reboot I get some weird resonance behavior that seems to disappear after restarting Chrony again. I currently have no RTT graph to show it with some reasonable resolution. The behaviour made me wonder if Chrony uses phase locked loops internally - because then that sort of resonance would surprise me even more.
Yes, chrony implements a PLL. Did you see a staircase response? That
happens when the frequency is changes rapidly, e.g. due to a
recalibration of the TSC clocksource after reboot. You can test it by
changing the first value in the drift file.
If it was more like an oscillation, that would be unexpected, at least
with current kernels. What arch and kernel are you using?
--
Miroslav Lichvar
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