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- To: chrony-users@xxxxxxxxxxxxxxxxxxxx
- Subject: [chrony-users] refclock lock max offset
- From: Nuno Gonçalves <nunojpg@xxxxxxxxx>
- Date: Tue, 20 Nov 2018 12:10:04 +0100
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Hi,
When there is a refclock with a lock directive, for example a PPS
locked to SOCK, naturally the SOCK must provide time close enough to
avoid ambiguity.
This threshold seems to be hardcoded at:
https://git.tuxfamily.org/chrony/chrony.git/tree/refclock.c#n538
It is a maximum of 0.2s, but can be significantly less when dispersion is high.
There are GPS chips with much higher offset variance, which leads to
pulses being ignored.
Currently this value is not configurable nor part of the documentation.
Is the way to go to patch this for the specific chip?
Thanks,
Nuno
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