Re: [chrony-dev] SW/HW timestamping on Linux

To: chrony-dev@xxxxxxxxxxxxxxxxxxxx
Subject: Re: [chrony-dev] SW/HW timestamping on Linux
From: Denny Page <dennypage@xxxxxx>
Date: Wed, 18 Jan 2017 10:53:06 -0800
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On Jan 18, 2017, at 09:56, Miroslav Lichvar <mlichvar@xxxxxxxxxx> wrote:

Avoiding the asymmetry on the PCIe bus is what I'm most interested in.

I’m not sure how much asymmetry on the PICe bus there is. Or how it affects PTP_SYS_OFFSET.

PCIe asymmetry/delay won't affect the actual timestamps. To my knowledge, the only asymmetry there is the PHY connection.

Denny

References:
- Re: [chrony-dev] SW/HW timestamping on Linux
  - From: Miroslav Lichvar
- Re: [chrony-dev] SW/HW timestamping on Linux
  - From: Denny Page
- Re: [chrony-dev] SW/HW timestamping on Linux
  - From: Denny Page
- Re: [chrony-dev] SW/HW timestamping on Linux
  - From: Miroslav Lichvar

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